1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device by performing connective exposure. The present invention also relates to a mask employed in the method of manufacturing a semiconductor device and a semiconductor device manufactured by this method.
2. Description of the Background Art
Connective exposure is performed in order to manufacture a semiconductor device such as an image sensor having an element size (device size, chip size) larger than the exposable size of an exposer. According to this connective exposure, a large-pattern semiconductor device is manufactured by temporarily dividing a large pattern to be transferred into a plurality of exposable small patterns and exposing the plurality of divided small patterns in a connective manner. A semiconductor device having a plurality of layers can be manufactured by repeating steps of forming single layers by connective exposure.
As a technique of such connective exposure, U.S. Pat. No. 6,194,105, for example, describes a method of dividing a mask into a plurality of mask through a blind while forming opaque trace patterns on the respective masks. A necessary mask is selected from the plurality of divided masks and arranged on a prescribed position for performing exposure. Arrangement of the masks is so adjusted as to align the trace patterns formed on the masks with each other. A large-sized pattern is formed by repeating such movement of the masks and exposure. As to dicing regions, dicing lines are first formed on a wafer for forming patterns to be connected with each other along the dicing lines so that overlap quantities of the patterns can be easily controlled and the patterns can be arranged to have a constant width along the dicing lines by setting the overlap quantities, as described in U.S. Pat. No. 6,225,013.
Japanese Patent Laying-Open No. 02-005568 (1990) describes a wafer stepper type photolithographic manufacturing method forming an array of patterns on a wafer, moving the wafer for performing exposure and repeating such operations until the wafer is entirely covered with the array of patterns. According to this method, alignment marks are exposed on a substrate through photolithography, and alignment patterns are formed in correspondence to the alignment marks. Then, an array of other alignment patterns is formed by alignment through the alignment marks. The aforementioned gazette describes that a large image region can be formed through a conventional wafer stepper according to this method. According to this method utilizing offset printing through photolithography, however, adjacent patterns are not superposed with each other and hence misalignment in printing disadvantageously results in disconnection on junctions between the adjacent patterns.